1. Field of the Invention
The present invention relates to semiconductor devices and methods of manufacturing thereof. More particularly, the present invention relates to a semiconductor device with an isolation insulator capable of being miniaturized and highly integrated without deterioration in the electric characteristics, and a method of manufacturing thereof.
2. Description of the Background Art
Semiconductor devices represented such as by DRAMs (Dynamic Random Access Memories) are conventionally known. FIG. 31 is a schematic cross sectional view showing a conventional semiconductor device.
Referring to FIG. 31, the semiconductor device includes a field effect transistor formed at a main surface of a semiconductor substrate 101. At the main surface of semiconductor substrate 101, an LOCOS (Local Oxidation of Silicon) isolation oxide film 129 is formed to isolate conductive regions. The source/drain regions 103a, 103b of the field effect transistors are formed in the conductive regions. In channel regions adjacent to source/drain regions 103a, 103b, gate insulation films 104a, 104b are formed on the main surface of semiconductor substrate 101. Gate electrodes 105a to 105c are formed on gate insulation films 104a, 104b and isolation oxide film 129. Gate electrode side walls 107a to 107dare formed on the side surfaces of gate electrodes 105a to 105c. An interlayer insulation film 109 is formed on gate electrodes 105a to 105c and gate electrode sidewalls 107a to 107d. In a region on source/drain regions 103a, 103b, contact holes 110a, 110b are formed in interlayer insulation film 109. In contact holes 110a, 110b and on interlayer insulation film 109, interconnections 111a, 111b are formed to electrically connect to source/drain regions 103a, 103b. A second interlayer insulation film 112 is formed on interlayer insulation film 109 and interconnections 111a, 111b. 
In recent years, miniaturization and integration of semiconductor devices have increasingly been demanded. Recently, the gate length of a field effect transistor in the semiconductor device as shown in FIG. 31 has been required to be as small as about 0.18 xcexcm. The inventors found out that problems as described below occur as semiconductors continue to be highly integrated and miniaturized. Referring to FIG. 32, the problems will be described in detail below.
FIG. 32 is a schematic cross sectional view for describing a method of manufacturing the semiconductor device shown in FIG. 31. As shown in FIG. 32, isolation oxide film 129 and source/drain regions 103a, 103b are formed at the main surface of semiconductor device 101 by a method similar to conventional methods of manufacturing a semiconductor device. Similarly, gate insulation films 104a, 104b, gate electrodes 105a to 105c, gate electrode sidewalls 107a to 107d and first interlayer insulation film 109 are formed on the main surface of semiconductor substrate 101. Then, a resist pattern 123 is formed on interlayer insulation film 109. By removing interlayer insulation film 109 through etching using resist pattern 123 as a mask, contact holes 110a, 110b are formed.
When the gate length of the field effect transistor is as fine as 0.18 xcexcm, the positioning accuracy of contact holes 110a, 110b are required to be higher than ever. However, the positions of contact holes 10a, 110b may be shifted from their prescribed positions such as by mask alignment errors in forming resist pattern 123 and the like. As shown in FIG. 32, ends 134a, 134b of isolation oxide film 129 may be removed during etching for forming contact holes 110a, 110b. 
After the step shown in FIG. 32, resist pattern 123 is removed. Then, interconnections 111a, 111b (see FIG. 33) formed of doped polysilicon, for example, are formed in contact holes 110a, 110b and on first interlayer insulation film 109. By forming second interlayer insulation film 112 (see FIG. 33) on interconnections 111a, 111b and first interlayer insulation film 109, the semiconductor device as shown in FIG. 33 can be obtained. Here, FIG. 33 is a schematic cross sectional view showing the semiconductor device manufactured by the manufacturing method shown in FIG. 32.
Referring to FIG. 33, the ends of isolation oxide film 129 are partially removed during etching for forming contact holes 110a, 110b, and the width W of isolation oxide film 129 is made smaller than a designed value. Here, a parasitic transistor is formed of which gate electrode is gate electrode 105c, which gate insulation film is isolation oxide film 129, and which source/drain regions are source/drain regions 103a, 103b. The width of isolation oxide film 129 corresponds to the gate length of the parasitic transistor. Since the gate length is made smaller than a desired value, the threshold voltage of the parasitic transistor becomes lower than a designed value. Accordingly, a junction leakage current in this semiconductor device becomes undesirably larger than a designed value. A large junction leakage current causes a malfunction of a semiconductor device circuit as an example, a cause of deteriorating the electric characteristics of a semiconductor device. These problems have become serious as semiconductor devices continue to be miniaturized and integrated.
One object of the present invention is to provide a semiconductor device capable of suppressing increase in the junction leakage current and preventing deterioration in the electric characteristics even when the device is miniaturized.
Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of suppressing increase in the junction leakage current and preventing deterioration in the electric characteristics even when the device is miniaturized.
A semiconductor device according to a first aspect of the present invention includes a semiconductor substrate, an isolation insulator, a gate electrode, a coating film, an interlayer insulation film, and a sidewall coating film. The semiconductor substrate has a main surface. The isolation insulator is formed at the main surface of the semiconductor substrate and isolates a conductive region. The gate electrode is formed in the conductive region. The coating film is formed on the isolation insulator, has a sidewall, and has a film thickness of at most that of the gate electrode. The interlayer insulation film is formed on the coating film. The sidewall coating film is formed on the sidewall of the coating film and includes a material having an etching rate different from that of the interlayer insulation film.
Accordingly, even when a contact hole is to be formed in a region adjacent to the sidewall coating film by removing part of the interlayer insulation film, the sidewall coating film serves as a protection film for preventing damage to the isolation insulator by etching. Thus, even if the position of a mask for etching is varied in the step of forming the contact hole, damage to the isolation insulator by etching can be prevented. As a result, removal of part of the isolation insulator by etching can be prevented, which can prevent reduction in the width of the isolation insulator. Thus, increase in the junction leakage current in the semiconductor device, which is due to reduction in the width of the isolation insulator, can be prevented. Therefore, deterioration in the electric characteristics of a semiconductor device, which is due to increase in the junction leakage current, can be prevented.
If the sidewall of the contact hole has its bottom partially including the sidewall coating film, the bottom area of the contact hole can be changed by changing the film thickness of the sidewall coating film. The film thickness of the sidewall coating film can be changed by changing the height of the coating film sidewall, which is brought out by changing the film thickness of the coating film. As a result, the bottom area of the contact hole can be changed arbitrarily by changing the film thickness of the coating film.
Since the film thickness of the sidewall coating film can be changed even by changing an angle formed by the sidewall of the coating film and the main surface of the semiconductor substrate, the bottom area of the contact hole can be changed arbitrarily similarly to the above case.
Since the coating film is formed on the isolation insulator, the planarity of the upper surface of the interlayer insulation film can be improved compared with a case where the coating film is not formed, even when the interlayer insulation film is to be formed to extend from the coating film to the gate electrode. As a result, a step portion can be prevented from being formed at the upper surface of the interlayer insulation film due to existence of the gate electrode. Thus, interconnections and the like formed on the interlayer insulation film can be prevented from being disconnected due to the step portion.
In the semiconductor device according to the first aspect, it is preferred that the angle formed by the sidewall of the coating film and the main surface of the semiconductor substrate is at least 60xc2x0 and at most 90xc2x0.
In this case, the sidewall coating film can be formed reliably.
In the semiconductor device according to the first aspect, it is preferred that the distance between the main surface of the semiconductor substrate and the upper surface of the coating film is at least 50 nm and at most 100 nm.
In this case, especially in the semiconductor device including a minute field effect transistor with a gate length of approximately 0.18 xcexcm, the sidewall coating film can be formed reliably and the planarity of the upper surface of the interlayer insulation film can be improved.
In the semiconductor device according to the first aspect, the isolation insulator may include an insulation film that is filled in a trench formed at the main surface of the semiconductor substrate.
In the semiconductor device according to the first aspect, the isolation insulator may include an oxide film that is formed by thermally oxidizing the main surface of the semiconductor substrate.
In the semiconductor device according to the first aspect, the conductive region may include a silicide layer.
In this case, the coating film can be used as a mask for forming the silicide layer as described in the method of manufacturing a semiconductor device below. Even when the coating film is to be formed, therefore, increase in the number of manufacturing steps can be suppressed. As a result, increase in the manufacturing cost of a semiconductor device can be prevented.
A semiconductor device according to a second aspect of the present invention includes a semiconductor substrate, an isolation insulator, an interlayer insulation film, and a sidewall coating film. The semiconductor substrate has a main surface. The isolation insulator is formed at the main surface of the semiconductor substrate, has a sidewall, and isolates a conductive region. The interlayer insulation film is formed on the isolation insulator. The sidewall coating film is formed on the sidewall of the isolation insulator and includes a material having an etching rate different from that of the interlayer insulation film. The isolation insulator includes upper and lower insulators. The upper insulator is placed over the main surface of the semiconductor substrate and has the sidewall. The lower insulator connects to the upper insulator and is placed under the main surface of the semiconductor substrate. The film thickness of the upper insulator is at least that of the lower insulator.
Accordingly, even when a contact hole is to be formed in a region adjacent to the sidewall coating film by removing part of the interlayer insulation film, the sidewall coating film selves as a protection film for preventing damage to the isolation insulator by etching. Thus, even if the position of a mask for etching is varied in the step of forming the contact hole, damage to the isolation insulator by etching can be prevented. As a result, removal of part of the isolation insulator by etching can be prevented, which can prevent reduction in the width of the isolation insulator. Thus, increase in the junction leakage current in the semiconductor device, which is due to reduction in the width of the isolation insulator, can be prevented. Therefore, deterioration in the electric characteristics of the semiconductor device, which is due to increase in the junction leakage current, can be prevented.
Since the film thickness of the upper insulator is at least that of the lower insulator, the sidewall coating film can be formed easily on the sidewall of the upper insulator.
If the sidewall of the contact hole has its bottom partially including the sidewall coating film, the bottom area of the contact hole can be changed by changing the film thickness of the sidewall coating film. The film thickness of the sidewall coating film can be changed by changing the height of the upper surface of the upper insulator, which is brought about by changing the film thickness of the upper insulator. As a result, the bottom area of the contact hole can be changed arbitrarily by changing the film thickness of the upper insulator.
Since the film thickness of the sidewall coating film can be changed even by changing an angle formed by the sidewall of the upper insulator and the main surface of the semiconductor substrate, the bottom area of the contact hole can be changed arbitrarily similarly to the above case.
In the semiconductor device according to the first or second aspect, the sidewall coating film may include a silicon nitride film.
In this case, the sidewall coating film includes a silicon nitride film having an etching rate different from that of a silicon oxide film that is generally used as an interlayer insulation film. Accordingly, the isolation insulator can be protected reliably by the sidewall coating film even during etching for forming a contact hole.
In the semiconductor device according to the first or second aspect, the sidewall coating film may include non-doped silicate glass.
In this case, the sidewall coating film includes non-doped silicate glass having an etching rate different from that of a silicon oxide film that is generally used as a interlayer insulation film. Accordingly, damage to the isolation insulator during etching for forming a contact hole can be prevented more reliably.
In the semiconductor device according to the first or second aspect, the sidewall coating film may include a low pressure TEOS oxide film.
In this case, the sidewall coating film includes a low pressure TEOS (low-pressure Tetra Ethyl Ortho Silicate) oxide film having an etching rate different from that of a silicon oxide film that is generally used as an interlayer insulation film, damage to the isolation insulator by etching can be prevented more reliably.
In a method of manufacturing a semiconductor device according to a third aspect of the present invention, an isolation insulator for isolating a conductive region is formed at a main surface of a semiconductor substrate. In the conductive region, a gate electrode is formed on the main surface of the semiconductor substrate. On the isolation insulator, a coating film is formed which has a sidewall and a film thickness of at most that of the gate electrode. A sidewall coating film is formed on the sidewall of the coating film.
Accordingly, a semiconductor device having a sidewall coating film can be formed easily.
Even when a contact hole is to be formed in a region adjacent to the sidewall coating film by forming an interlayer insulation film on the conductive region and removing part of the interlayer insulation film, the sidewall coating film can be used as a protection film for protecting the isolation insulator. Thus, partial removal of the isolation insulator by etching can be prevented. As a result, increase in the junction leakage current, which is due to partial removal of the isolation insulator, can be prevented. Therefore, deterioration in the electric characteristics of the semiconductor device can be prevented.
In the method of manufacturing a semiconductor device according to the third aspect, the step of forming the isolation insulator may include forming a resist pattern on the semiconductor substrate, forming a trench at the main surface of the semiconductor substrate by removing part of the main surface of the semiconductor substrate using the resist pattern as a mask, and filling an insulation film in the trench.
In the method of manufacturing a semiconductor device according to the third aspect, the step of forming the isolation insulator may include forming an antioxidant film on a region to be a conductive region, and thermally oxidizing the main surface of the semiconductor substrate in a region other than the region where the antioxidant film is formed.
The method of manufacturing a semiconductor device according to the third aspect of the present invention may include the step of forming a silicide layer in the conductive region using the coating film as a mask.
In this case, the coating film is used as a mask and there is no need to separately prepare a mask for forming the silicide layer. As a result, the number of manufacturing steps of a semiconductor device can be reduced compared with a case where a mask is separately prepared.
In the method of manufacturing a semiconductor device according to the third aspect, the gate electrode may have a side surface, and the step of forming the sidewall coating film may include forming a sidewall insulation film on the side surface of the gate electrode.
In this case, the sidewall insulation film and the sidewall coating film can be formed simultaneously and the number of manufacturing steps of a semiconductor device can be reduced.
In a method of manufacturing a semiconductor device according to a fourth aspect of the present invention, an isolation insulator isolating a conductive region and having a sidewall is formed at a main surface of semiconductor substrate. A sidewall coating film is formed on the sidewall of the isolation insulator. The isolation insulator includes upper and lower insulators. The upper insulator is placed over the main surface of the semiconductor substrate and has the sidewall. The lower insulator connects to the upper insulator and is placed under the main surface of the semiconductor substrate. The film thickness of the upper insulator is at least that of the lower insulator.
Accordingly, a semiconductor device that has an isolation insulator including a sidewall coating film can be formed easily.
Even when a contact hole is to be formed in a region adjacent to the sidewall coating film by forming an interlayer insulation film on the conductive region and removing part of the interlayer insulation film through etching, the sidewall coating film can be used as a protection film for the isolation insulator during etching. Thus, partial removal of the isolation insulator by etching can be prevented. As a result, increase in the junction leakage current in the semiconductor device, which is due to partial removal of the isolation insulator, can be prevented. Therefore, deterioration in the electric characteristics of the semiconductor device can be prevented.
The method of manufacturing a semiconductor device according to the fourth aspect may include, prior to the step of forming the isolation insulator, the processing step of making the main surface of the semiconductor substrate in a region where the conductive region is formed lower than the main surface of the semiconductor device in a region where the isolation insulator is formed.
In this case, the main surface of the semiconductor substrate in the region where the isolation insulator is formed can be made higher than the main surface of the semiconductor substrate in the region where the conductive region is formed in the step of forming the isolation insulator. Thus, the film thickness of the upper insulator of the isolation insulator can reliably be made to have the film thickness of at least that of the lower insulator.
Further, an angle formed by the main surface of the semiconductor substrate and the sidewall of a step portion between the region where the isolation insulator is formed and the region where the conductive region is formed can be changed in the processing step. When the isolation insulator is to be formed by thermally oxidizing the main surface of the semiconductor substrate, change in the angle formed by the sidewall of the step portion and the main surface of the semiconductor substrate also changes an angle formed by the sidewall of the isolation insulator and the main surface of the semiconductor substrate. As a result, the angle formed by the sidewall of the isolation insulator and the main surface of the semiconductor substrate can be change easily.
The method of manufacturing a semiconductor device according to the fourth aspect may further include the step of forming a gate electrode having a side surface in the conductive region. The step of forming the sidewall coating film may include forming a sidewall insulation film on the side surface of the gate electrode.
In this case, the sidewall insulation film can be formed simultaneously with the sidewall coating film, and increase in the number of manufacturing steps of a semiconductor device can be prevented. Thus, increase in the manufacturing cost of a semiconductor device can also be prevented.
In the method of manufacturing a semiconductor device according to the third or fourth aspect, the sidewall coating film may include a silicon nitride film.
In this case, the sidewall coating film includes a silicon nitride film having an etching rate different from that of a silicon oxide film that is generally used as an interlayer insulation film. Thus, the sidewall coating film serves as a protection film for the isolation insulator even during etching for forming a contact hole in the interlayer insulation film. As a result, damage to the isolation insulator by etching can be prevented reliably.
In the method of manufacturing semiconductor device according to the third or fourth aspect, the sidewall coating film may include non-doped silicate glass.
In this case, non-doped silicate glass of which etching rate is different from that of a silicon oxide film used as an interlayer insulation film more than it is from that of a silicon nitride film is used as the sidewall coating film. Thus, damage to the isolation insulator by etching can be prevented more reliably.
In the method of manufacturing a semiconductor device according to the third or fourth aspect, the sidewall coating film may include a low pressure TEOS oxide film.
In this case, the low pressure TEOS oxide film of which etching rate is different from that of a silicon oxide film used as an interlayer insulation film more than it is from that of a silicon nitride film is used as the sidewall coating film. Thus, damage to the isolation insulator by etching can be prevented more reliably during etching for forming a contact hole.
In a method of manufacturing a semiconductor device according to a fifth aspect of the present invention, an isolation insulator isolating a conductive region and having a sidewall is formed at a main surface of a semiconductor substrate. A gate electrode having a side surface is formed in the conductive region. A sidewall coating film is formed on the sidewall of the isolation insulator. The step of forming the sidewall coating film includes forming a sidewall insulation film on the side surface of the gate electrode.
Accordingly, the sidewall insulation film can be formed simultaneously with the sidewall coating film, and increase in the number of manufacturing steps of a semiconductor device can be prevented. Therefore, increase in the manufacturing cost of a semiconductor device can also be prevented.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.